1. Field of the Invention
The present invention relates generally to the field of electrical devices. More particularly, the present invention relates to the field of output buffers.
2. Description of the Related Art
With increased use and complexity of digital data processing systems, the speed at which digital data processing systems are able to perform various tasks has become more and more important.
One type of digital device that may limit the performance of digital data processing systems is output buffers. Output buffers are typically employed in digital data processing systems to drive addresses, data, or control signals, for example, over bus lines that couple various digital components, such as microprocessors, various storage or memory devices, controllers, etc.
For each bit to be outputted over the bus lines, a typical output buffer uses pull-up circuitry or pull-down circuitry to drive either a logical-one or high signal or a logical-zero or low signal, respectively, over a bus line depending upon the state of the bit to be outputted. Many times the output buffer undergoes various transitions in driving bits over the bus lines.
For example, the output buffer may undergo selected-to-deselected and deselected-to-selected transitions as the output buffer is used in driving bits over the bus lines. For example, the output buffer may first be in a deselected state as the output buffer is not being used to drive any bits over a bus line. In the deselected state, the output buffer is electrically isolated from the bus line to avoid interfering with other output buffers that may be driving data over the same bus line, for example. When the output buffer is selected for driving signals over the bus line, the output buffer undergoes a deselected-to-selected transition to electrically couple the output buffer to the bus line in driving signals over the bus line.
The output buffer may also undergo high-to-low and low-to-high transitions in driving bits over the bus lines. For example, the output buffer may first output a logical-one or high signal over a bit line and then output a logical-zero or low signal over the same bit line. The output buffer undergoes a high-to-low transition in order to output the subsequent low signal.
Because of the various transitions the output buffer endures in outputting bits, the output of each bit onto a bus line is delayed. As a result of such delays, the performance of digital data processing systems becomes limited.